1. Technical Field
The present invention relates to a super junction MOSFET device and a semiconductor chip.
2. Related Art
Conventionally, in a super junction (abbreviated as SJ) MOSFET, an n+-type impurity region is provided as a source region near a gate electrode, as shown in Patent Document 1, for example. Furthermore, in a conventional SJ MOSFET, an n-type source region is provided over the entire upper portion of a p-type channel region, as shown in Patent Document 2, for example.    Patent Document 1: Japanese Patent Application Publication No. 2013-084905    Patent Document 2: Japanese Patent Application Publication No. 2010-109033
In order to prevent breakdown of an SJ MOSFET device during reverse recovery, there are cases where a free wheeling diode (abbreviated FWD) is connected in parallel with the SJ MOSFET device. In such a case, in order for a surge current to flow through the FWD when the SJ MOSFET device is OFF, it is necessary for the forward voltage (abbreviated Vf) of the body diode of the SJ MOSFET device to be raised above Vf of the FWD. For example, defects are introduced by irradiating a p-type column of the SJ MOSFET device with an electron beam, thereby enabling an increase in Vf of the body diode. However, in this case, due to the introduction of the defects, there is a problem that the leak current from the SJ MOSFET device increases by 20 times to 40 times more than in a case where irradiation with the electron beam is not performed.